Electronic Systems and Computer Systems (SESI)
The objective of the SESI program is to train specialists in the hardware and software design of embedded systems. These systems are ubiquitous, controlling all types of equipment: automobiles, airplanes, drones, telephones, telecommunications, internet boxes, games, household appliances, etc.
It is an applied training with content that is updated every year because R&D for embedded systems is constantly evolving: there is little time between research, innovation, industrial transfer and the marketing of new systems
Presentation
Embedded systems typically embed:
- Sensors that perceive the environment (image, sound, temperature, etc...)
- Processors and co-processors for processing the data collected by the sensors
- Wired or wireless communication interfaces to connect to other systems and infrastructures
- User interaction devices (screen, keyboard, etc...)
They require the combined use of hardware and software devices, and their design is therefore based on skills in electronics and computer science. This double competency is the specificity of the training.
Embedded systems are generally subject to specific constraints, particularly in terms of size, reliability, and energy autonomy. Because of these specificities, the realization of such systems requires dedicated modeling, design methods and tools, ensuring the efficient interaction of the software with the hardware. The objective of the SESI course is to enable students to master these tools and methods.
Competency Profiles
The SESI program offers three skill profiles that are clearly visible on the job market. Each profile allows students to acquire a solid base of knowledge, complemented by a specialization in different aspects of embedded system design:
- Profile A: Multi-core architecture, OS and applications (high-level system design, multi-core and high-performance architectures, joint hardware and software design, embedded operating systems)
- S Profile: Electronic and programmable systems (design of hardware and software architecture on FPGA, design of optimized coprocessors, system integration on chip and board
- Profile C: Heterogeneous circuit design (digital and analog integrated circuit design, CAD, multi-domain on-chip integration)
The acquisition of one of these three profiles is determined by the combination of courses chosen by the student in the second semester of the first and second years. These teaching modules prepare students for both professional integration in industry and for pursuing a doctorate.
Given the extremely rapid evolution of design tools and methods, research in this field is very dynamic. Indeed, there is very little time between the innovation and its industrial implementation. The only difference between the professional and research orientations is the type of internship (laboratory or company) which takes place at the beginning of the M2 year.
Program
The objective of this first year is to provide all the necessary bases for the hardware and software design of an embedded system.
Organization
The M1 year is divided into two semesters, each of which consists of 11 weeks of teaching. The first semester generally begins in mid-September and the second semester in early February. During each semester, students take five 6-credit courses (ECTS) for a total of 30 ECTS per semester. They may be authorized to take a sixth UE upon the decision of the course director and after examination of the results previously obtained.
First semester (M1-S1)
The ARCHI1 and VLSI1 courses are prerequisites to continue in the program. The table below lists the UE offered to students. The table also indicates the competency profile(s) associated with each UE. Several courses are shared with the Communicating Systems course of the Engineering Sciences Master (SPI). Some of the courses in this Master's program can therefore be taken as part of the SESI curriculum. The pedagogical proposal can ultimately be completed by the other courses of the Master of Computer Science (lightest lines in the table).
Acronym | Title | Profile A | Profile S | Profile C | Status |
ARCHI1 | Architecture of RISC processors | X | X | X | Mandatory EU |
VLSI1 | Introduction to VLSI design of digital circuits | X | X | X | Mandatory EU |
MOBJ | Object modeling for circuit design | X | X | X | UE to choose from |
SIGNAL | Signal processing | X | X | UE to choose from | |
SEA | Analog electronic systems | X | X | UE to choose from | |
ARES | Network architecture | X | UE to choose from | ||
NOYAU | Advanced architecture of operating system kernels | X | UE to choose from | ||
PR | Distributed programming | X | UE to choose from |
Second semester (M1-S2)
The table below lists the courses offered in the second semester. It also indicates the competency profile(s) associated with each UE. This proposal can be completed by the other courses of the Master of Computer Science (lighter lines of the table). In addition to these 5 UEs, the students follow a UE of English counting for 3 ECTS. These 3 ECTS will be carried over to Semester 4.
Acronym | Title | Profile A | Profile S | Profile C | Status |
ANUMDSP | Hardware and software implementation of signal processing algorithms | X | X | UE to choose from | |
ARCHI2 | Architecture of multiprocessor systems | X | X | UE to choose from | |
FPGA1 | Programmable systems | X | X | X | UE to choose from |
PERI | Device management | X | X | X | UE to choose from |
PSESI | SESI Project | X | X | X | UE to choose from |
ECFA | Electronics of analog circuits and functions | X | X | UE to choose from | |
HF | Transmission lines and antennas | X | UE to choose from | ||
AR | Distributed Algorithms | X | UE to choose from | ||
COMNUM | Digital communications | X | X | UE to choose from | |
PN | Programming in the heart of the LINUX kernel | X | UE to choose from | ||
SPECIF | System specification | X | UE to choose from |
Following the agreement of the course director and the directors of the courses concerned, a student may integrate into his or her teaching contract units offered by other courses, but in this case, no compatibility of timetables can be guaranteed.
The objective of the second year of the SESI course is to deepen the knowledge seen in the first year and to allow students to acquire advanced skills in the field of hardware and software design of embedded systems.
Organization
The M2 year is divided into two semesters. The first semester is devoted to academic teaching. Students have to choose 5 UEs of 6 ECTS each. The second semester is devoted to the end-of-study internship. This internship has a value of 24 ECTS, the semester being completed by a UE of English (3 ECTS) and a UE of Professional Placement (3 ECTS) taken during the previous semesters.
Each UE of the first semester lasts approximately 60 hours. With the exception of one compulsory course, students are free to choose their course of study, provided they meet the prerequisites. This allows them to specialize in systems or circuit themes, and to acquire skills related to their professional project.
For the internship, students are asked to choose during the first semester whether they wish to pursue a professional career in industry or a doctorate. In the first case, the end-of-study internship is a professional internship in a company. In the second case, the end-of-study internship is a research internship in one of the laboratories associated with the SESI program or in another research laboratory, whether academic or industrial.
Third semester (M2-S3)
The table below lists the UEs of the pathway offered to students. This table also indicates the competency profile(s) associated with each UE. This offer can be completed by the offer of the other courses of the Master in Computer Science.
Acronym | Title | Profile A | Profile S | Profile C | Status |
MASSOC | Modeling, analysis and simulation of embedded systems-on-chip | X | X | X | Mandatory UE |
ARCHI3 | High performance architectures | X | X | UE to choose from | |
ARCHI4 | Massively multi-core architectures | X | UE to choose from | ||
CBIS | Power consumption, noise and signal integrity | X | X | UE to choose from | |
CCN | Circuit design for digital communications | X | UE to choose from | ||
ELECANA3 | Analog circuits: synthesis methods and tools | X | UE to choose from | ||
FPGA2 | Platform-based design and High level synthesis | X | X | UE to choose from | |
OSEM | OS and applications on embedded and multicore platforms | X | X | UE to choose from | |
TASE | Embedded systems technologies and applications | X | X | X | UE to choose from |
VLSI2 | Advanced digital circuit design | X | UE to choose from |
Target audience and pre-requisites:
Students with a computer science degree or an EEA degree.
The M2 level is open to engineers who wish to specialize, and to engineering students in their final year, within the framework of agreements between Sorbonne University and other higher education institutions.
Opportunities
Industrial world:
- Embedded software engineer;
- Systems engineer or Systems designer
- Hardware engineer or Hardware architect;
- Integrated circuit designer - IC designer ;
- Technical expert or project manager.
Research World:
- Researcher, R&D engineer;
- University teacher-researcher;
- Researcher in a research organization (CNRS, INRIA, ONERA, CEA);
Note that it is possible to become a research engineer in the industrial world, with a PhD (applied thesis).
Contacts
Responsible for the course
Pirouz BAZARGAN
Lionel LACASSAGNE
Secretary
Eva LASKOWSKI